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Digital Electronics
NUMBER SYSTEM
BINARY CODES
BOOLEAN ALGEBRA
BINARY LOGIC
LOGIC GATES
BOOLEAN ALGEBRA LAWS
CONSENSUS THEOREM
DIFFERENT FORS OF BOOLEAN EQUATIONS
RELATION B/W MAX & MIN TERMS
16 type of LOGIC FUNCTIONS
AND & OR GATE
Other GATES
XOR & XNOR gates
NEGATED & COMPLIMENTRY GATES
TRISTATE gates & DIP
Illustration of NEGATIVE & POSITIVE LOGIC
Relation B/W XOR & XNOR gates
UNIVERSAL GATES
Implementation of XOR using minimum gates
Implementation of XNOR using minimum gates
Different levels of CIRCUIT
Special Characteristics of an IC
QUESTIONS
Q1 (Timing Diagram)
Q2 (Timing Diagram)
Q3 (Timing Diagram - DIfferent units)
Q4 (Timing Diagram)
Q5 (Output of Series of NOR gate )
Q6 (Output of combination of XOR )
Q7 (Circuit of NAND gates & diff delays)
K MAPS
COMBINATIONAL CKT
SEQUENTIAL CIRCUITS
TIMING CIRCUITS

 

Negated or Bubbled gates:

These are those gates which have inverted inputs to the gate as shown below:

Negated AND gate is actually NOR gate while negated OR gate is NAND gate which can shown from the truth tables of Negated OR & Negated AND gate and from algebraic equations also.

NEGATED AND can also be called invert-AND and NEGATED OR can be called as invert-OR

Complimentary gates: Logic gates which give both inverted and non-inverted outputs are called complimentary gates. Suppose we have a 2-input complimentary AND gate, then it means that this gate simultaneously gives 2 outputs- one of AND gate and other of NAND gate. Such gates exist and are generally used in the circuits where not much space is available to mount new ICs. Also in complimentary gates internal circuitry is such that there in no extra time delay to calculate the inverted output i.e. inverted output and the non-inverted output come at time. Also if we use an inverter in place of complimentary gate then there would be extra time delay and extra space required. Such gates are represented as

 


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