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Digital Electronics
NUMBER SYSTEM
BINARY CODES
BOOLEAN ALGEBRA
BINARY LOGIC
LOGIC GATES
BOOLEAN ALGEBRA LAWS
CONSENSUS THEOREM
DIFFERENT FORS OF BOOLEAN EQUATIONS
RELATION B/W MAX & MIN TERMS
16 type of LOGIC FUNCTIONS
AND & OR GATE
Other GATES
XOR & XNOR gates
NEGATED & COMPLIMENTRY GATES
TRISTATE gates & DIP
Illustration of NEGATIVE & POSITIVE LOGIC
Relation B/W XOR & XNOR gates
UNIVERSAL GATES
Implementation of XOR using minimum gates
Implementation of XNOR using minimum gates
Different levels of CIRCUIT
Special Characteristics of an IC
QUESTIONS
Q1 (Timing Diagram)
Q2 (Timing Diagram)
Q3 (Timing Diagram - DIfferent units)
Q4 (Timing Diagram)
Q5 (Output of Series of NOR gate )
Q6 (Output of combination of XOR )
Q7 (Circuit of NAND gates & diff delays)
K MAPS
COMBINATIONAL CKT
SEQUENTIAL CIRCUITS
TIMING CIRCUITS

 

 

Q- Implement 2 variable XNOR gate using NOR only in minimum number of gates.

F= x XNOR y = (x XOR y)’

F’= (x XOR y) = x’y+xy’ = x’y+xy’+xx’+yy’ = (x+y) (x’+y’)

F’= x’(x+y) + y’(x+y)

Take compliment

F= (x’(x+y) + y’(x+y))’ = (x’(x+y) )’ . (y’(x+y))’ =(x+(x+y)’). (y + (x+y)’)  

Take compliment again

F’= ( (x+(x+y)’). (y + (x+y)’) )’ = (x+(x+y)’)’ + (y + (x+y)’)’

Take compliment again

F= [ (x+(x+y)’)’ + (y + (x+y)’)’ ]’

Now we can implement the circuit of XNOR gate using NOR gates

 

Hence we need only 4 NOR GATES to implement XNOR gate and we require 5 NOR gates to implement XOR gate with 5th NOR gate used as inverter and placed in front of 4th NOR gate.

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