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Digital Electronics
NUMBER SYSTEM
BINARY CODES
BOOLEAN ALGEBRA
BINARY LOGIC
LOGIC GATES
BOOLEAN ALGEBRA LAWS
CONSENSUS THEOREM
DIFFERENT FORS OF BOOLEAN EQUATIONS
RELATION B/W MAX & MIN TERMS
16 type of LOGIC FUNCTIONS
AND & OR GATE
Other GATES
XOR & XNOR gates
NEGATED & COMPLIMENTRY GATES
TRISTATE gates & DIP
Illustration of NEGATIVE & POSITIVE LOGIC
Relation B/W XOR & XNOR gates
UNIVERSAL GATES
Implementation of XOR using minimum gates
Implementation of XNOR using minimum gates
Different levels of CIRCUIT
Special Characteristics of an IC
QUESTIONS
Q1 (Timing Diagram)
Q2 (Timing Diagram)
Q3 (Timing Diagram - DIfferent units)
Q4 (Timing Diagram)
Q5 (Output of Series of NOR gate )
Q6 (Output of combination of XOR )
Q7 (Circuit of NAND gates & diff delays)
K MAPS
COMBINATIONAL CKT
SEQUENTIAL CIRCUITS
TIMING CIRCUITS

 

 

Division of the circuit in different levels:

We have some eternal inputs which are used directly or indirectly by the elements of the circuit to obtain output. The elements or the gates which receive all their input from the external inputs directly constitute the logical level one of the circuit while the gates which receive at least one input from the output of the gates of level one and not higher are under the logical level two of the circuit. Similarly we get 3rd and 4th level and so on.

From the above circuit we can see that only gate 1 is receiving all the input from external inputs derectly hence gate 1 is in logic level1

As gate 2 is receiving one input directly while the other input from gate 1 so gate 2 is in level 2 of the circuit.

Gate 3 receives the1st input directly from external input, 2nd input from output of gate 1 but it is not a level 2 gate as it is also receiving its third input which is from gate 2 (a level 2 gate), hence gate 3 is a level 3 gate.

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