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Digital Electronics
NUMBER SYSTEM
BINARY CODES
BOOLEAN ALGEBRA
K MAPS
COMBINATIONAL CKT
SEQUENTIAL CIRCUITS
INTRODUCTION
CLOCK
BISTABLE MULTIVIBRATOR
DERIVATION of FLIPFLOP circuit
RS FLIPFLOP
RS FLIPFLOP(NAND IMPLEMENTATION)
R'S' FLIPFLOP
Clocking RS LATCH
Other LATCHes
Timing problem in LATCHES
MORE QUESTIONS
TIMING CIRCUITS

 

QUESTIONS:

 Q-What is the difference between LATCH & FLIP-Flop?

Ans:  We can easily find the answer after going through the theory given:

  1. Latches are level sensitive while flip-flops are edge sensitive devices
  2. Hence latches faces problems like glitches in the output while no such problem occurs in flip-flops.
  3. As we can see from different circuits given earlier, we need more gates to implement flip-flops than latches.

 Q- Implement the function of D latch using MUX?

Ans:  We know D-LATCH can be triggered when CLK is 1 (positive level triggered) or when CLK is 0 (negative level triggered). Hence we can implement both of these as follow:

And we can make a truth table for each of these as:

Those are actually the truth tables for D-LATCH. Hence we get the D-latch using MUX.

Q- Implement the function of T latch using MUX & a NAND gate?

Ans:  We can achieve the above as follow:

 

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