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Processor Tutorial
INTERNAL COMPONENTS OF A PROCESSOR
DIFF. ARCHITECTURES
CLOCK FREQUENCY
PROCESSOR PERFORMANCE MEASUREMENT
MODERN ARCHITECTURE IMPROVEMENTS
IMPORTANT TERMS
HOW INSTRUCTIONS ARE FORMED?
MEMORY
 

 

 

Instruction Encoding

This topic is intended to make a better understanding of the microprocessor instructions which can very helpful during the course of an interview of any embedded company. In this topic we’ll see how instruction opcodes are decided and how they vary with no of instructions and instruction format. This a very easy topic and everyone must go though it.

In general an instruction has 2 components:

  1. Op-code field
  2. Address field

Op-code field tells how data is to manipulated and address field tells us about the address of different data. Address field may contain zero or one or two or more addresses. Consider the instruction

  Mov                       A, B

Opcode              Address

Field                      Field

Depending on the different addressing modes one can have different instruction formats:

  1. Zero address instructions
  2. One address instructions
  3. Two address instructions

Size of instruction word is decided by the designer depending upon the no of instructions required and instruction’s format. Suppose we have 8 bit instruction word. We’ll see how many instructions we can have and Address is of 3 bits.

Zero address instructions:

As there is no address to be specified so we can use all 8 bits for opcode hence we can have 28=256 opcodes and 28 =256 instructions with no address fields.

One address instructions:

As we have to specify one 3 bit address field so we’ll use 3 bits for address and rest 5 bits for opcodes. Hence we can have 25=32 opcodes and 25 =32 instructions with 1 address fields.

 

Opcode                                                add1                     

            p4 p3 p2 p1p0                                          

                 00000                                   a2a1a0                   

                  00001                                  a2a1a0                             

                  00010                                  a2a1a0                             

                  00011                                  a2a1a0     

                           ………

                 ………

                         11111                                    a2a1a0     

 Two address instructions:

Here we have to specify 2 3-bit address fields so we use 6 bits for the address and rest 2 bits for opcode. So we can have 22=4 opcodes and hence 22=4 instructions with 2 address fields.

 And we can assign different opcodes to different instructions which have the similar address fields.

Now if we reduce the no of two address instructions from 4 to 3 then we can have 8 more one addresss instructions as

And now if we reduce no. of one address instructions from 8 to 7 then we can accommodate 8 more zero address instructions.

 

So we can have 3 two address instructions, 7 one address instructions and 8 zero address instructions with total 8 bit of instruction word.

 

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