## PARITY GENERATOR (3-bit MESSAGE)

Q-Implement the parity generator (a) Even (b) Odd for 3-bit message Ans: (a) Following is the truth table and K-map for even parity a              b             c             P(even) 0              0             0             0 0              0              1             1 0              1              0             1 0              1              1             0 1              0              0              […]

## PARITY GENERATOR (4-bit MESSAGE)

Q-Implement the parity generator (a) Even (b) Odd for 4-bit message Ans: (a) Following is the truth table and K-map for even parity Binary number                  Parity (even) 0000                                       0 0001                                       1 0010                                       1 0011                                       0 0100                                       1 0101                                       0 0110                                       0 0111                                       1 1000                                       1 1001                                       0 1010 […]

## GRAY to BINARY Code Converter

We have already discussed the procedure for this and procedure can be described by following diagram: From the diagram above we can derive the equations directly without any maps. We know that B3 = G3 and B2 is calculated by adding B3 & G2 (ignoring carry) so B2= B3 xor G2 Similarly B1= B2 xor G1 B0= B1 xor […]

## Binary to Gray Code converter

In this circuit we’ll convert BINARY numbers to GRAY numbers. Following is the truth table for it: B3           B2          B1           B0           G3           G2          G1          G0 0.            0              0              0              0              0              0              0              0 1.            0             0             0              1 […]

## Q: Implement LOGIC GATES using MUX

Q- Using 2 to 1 MUX implement the following 2-input gates: (a) OR (b) AND (c) NOR (d) NAND (e) XOR   (f) XNOR (g) NOT. Ans: To implement the above for every gate, either we can derive the different gates using the logic (the truth table) or the procedure to implement any function with MUX (discussed […]

## Q2: Implement the function using MUX

To implement the function F(A, B, C, D)= Σ (1, 2, 5, 7, 9, 14) using MUX using different variable as selection variable. Let’s now take the variable A for input lines and B, C & D for selection lines. N=4 so MUX is 2 N-1= 23 = 8 to 1 So min terms with A in compliment form are 0 […]

## Q: Implement function using MUX

e.g. To implement the function F(A, B, C)= Σ (1, 2, 5, 7) using MUX using different variable as selection variable. Let’s now take the variable B for input lines and A & C for selection lines. The min terms with B in compliment form are 0, 1, 4, 5 and the min terms with B in un-complimented form are […]

## Q: Boolean function Implementation using MUXes

Q-How to implement any Boolean function using MUX? Ans: While implementing any function using MUX, if we have N variables in the function then we take (N-1) variables on the selection lines and 1 variable is used for inputs of MUX. As we have N-1 variables on selection lines we need to have 2 N-1 to 1 […]

## Q: HIGHER MUXes from LOWER MUXes

Q- Implement (a) 8 to 1 MUX (b) 16 to 1 MUX using 4 to 1 MUX. Ans: (a) Select lines are abc2 Following is the 8 to 1 multiplexer from 4 to 1 multiplexer (b)Select lines are abcd2 Following is the circuit for 16 to 1 MUX

## Multiplexers

It is a combinational circuit which selects one of the 2n input lines and transmits the information from that line to the output line. The selection of the input line depends upon the ‘n’ input selection lines. It is also called data selector and is also referred to by only MUX. Smallest MUX we have is 2 to 1 […]