Q-What is the difference between LATCH & FLIP-Flop? Ans: We can easily find the answer after going through the theory given: Latches are level sensitive while flip-flops are edge sensitive devices Hence latches faces problems like glitches in the output while no such problem occurs in flip-flops. As we can see from different circuits given […]
Tag: D latch
Timing Problem in Latches
Well in sequential circuits, paths exit between latches through combinational circuits from one latch to other or from output of latch to input of same latch. When we give a feed back to input of same latch then we face a timing problem as shown: Suppose we have the following circuit: In this circuit when […]
D Latch
As we have already discussed that when ever we have both R & S equal to 1 we witness an ambiguous state. Hence to avoid this we have made an arrangement in which we’ll never have both R & S equal. We connect the two inputs with an inverter between them as shown below: This […]