Q- Find the maximum clock frequency of the following circuit and specifications of the flip-flop are as T (setup) = 5ns T (hold time) = 4ns T (CLK to Q) = 9ns and delay of other components is T (buf) = 2ns,ï¿½ ï¿½ T (AND) = 4 ns, T (OR) = 4 ns,ï¿½ ï¿½ ï¿½ ï¿½ T (NOT) = […]
We can also represent the above circuit using NAND gates as: Let’s convert to NAND circuit step by step. R’S’ FLIPFLOP The characteristics of the FF are as given in table: Now we replace R by R (bar) and S by S (bar) and eliminating the 2 circles and hence final circuit.
DERIVING THE CIRCUIT OF FLIPFLOP (from digital components): To understand the logic let’s consider a basic circuit of an inverter with a feedback as below: Now what would be the output of the circuit? We know what ever is at input, we’ll get inverse of that at output and as output is fed back to input […]