We use 2 separate latches to construct a master-slave flip-flop. One latch acts as a Master and other acts as a Slave. Both are level triggered latches but one is latched on positive level and other on negative level. Diagram of the RS master-slave flip-flop is as: First latch acts as a master and 2nd latch acts as […]
Tag: rs latch
Clocking RS latch
We can control RS Latch with clock by ANDing both inputs with clock separately as: Hence when we have CLK (OR E) = 1, R & S gets passed to the RS latch circuit and hence the output is affected by the inputs only when CLK (OR E) = 1 and when CLK (OR E)=0, […]
RS Flip flop
When R=0, S=0 we don’t have a change in the output in the circuit. When R=0, S=1 we have output as Q=1 and Q bar = 0 When R=1, S=0 we have the output as Q=0 and Q bar = 1 But when we have R=1, S=1, both R and S make outputs of their […]
Deriving the circuit of Flip flop
DERIVING THE CIRCUIT OF FLIPFLOP (from digital components): To understand the logic let’s consider a basic circuit of an inverter with a feedback as below: Now what would be the output of the circuit? We know what ever is at input, we’ll get inverse of that at output and as output is fed back to input […]