ASLAN NEFERLER TİMQ- Can we design a MOD-6 counter using the above method?
Ans: We firstly draw the state diagram
And now we draw the table to represent the desired output of the combinational circuit to reset FFs as:
Q2 Q1 Q0 OUTPUT
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
And using K-map we get the combinational circuit as
And the complete circuit is as:
Q- Design MOD-3 ripple counter using (a) Observing outputs (b) K-maps to design the circuit.
Ans: (a)We can design the MOD 3 counter using 2 FFs as 3 is less than 4 i.e. 22 and greater than 2. We can see directly that as we have to reset the counter only after 2 i.e. when output is 3 we reset the counter and hence we need to reset only when we have Q0= 1 & Q1=1. Now firstly design MOD-4 counter using 2 FFs and then take NAND of Q0 & Q1 and feed the output to CLEAR of both FFs.
(b) We firstly draw state diagram of the counter required as:
And we have the general circuit to design the other than MOD 2 n then we have the general circuit as
And now we draw a table to list the different input combinations to Combinational circuit and their corresponding output as:
Q1 Q0 OUTPUT of reset logic
0 0 1
0 1 1
1 0 1
1 1 0
And using K-map as
And hence we get the whole circuit for MOD-3 counter as
We first write the truth table for required Flip-flop i.e. RS FF
Now we write the excitation table of given FF i.e. D flip-flop as
Now we combine two tables to get the combinational circuit as:
Now we design the combinational circuit to convert J, K to corresponding R, S
K-map for D input:
And we get the circuit to convert D to SR FF:
We first write the truth table for required Flip-flop i.e. JK FF
Now we write the excitation table of given FF SR flip-flop as
Now we combine two tables to get the combinational circuit as:
Now we design the combinational circuit to convert J, K to corresponding R, S
K-map for S input:
K-map for R input:
So we get the circuit to convert RS FF to JK FF:
Let’s first now derive the D flip-flop from RS flip-flop which we have already done:
We first write the truth table for required D flip-flop as
Now we write the excitation table of given FF SR flip-flop as
Now we need to make a arrangement so that we manipulate input D to inputs R, S such that we get the same output with RS FF as that of D FF. So we combine the two tables given above with same outputs in the same row:
Now we design the combinational circuit to convert D input to SR inputs using K-map as:
K-map for S input:
K-map for R input:
Hence we convert the SR FF to D FF as:
