As we have generally slow changing DATA signals i.e. DATA signals have slow rising and falling edges. And use of these signals creates problems in the working of Digital circuits. Hence to avoid these problems we use SCHMITT TRIGGER to sharpen up the edges of DATA. The transfer characteristics of this trigger are as follow: […]

# Digital Electronics

## 555 Timer: Astable Operation

In Astable operation, we have no stable states. Hence we say that timer doesn’t stay in any of the two states indefinitely i.e. vibrates between the two states. Hence we don’t need trigger in this case. This is also called Astable Multi-vibrator. This is also called free-running multi-vibrator. When-ever we give power to the timer, we get the […]

## 555 Timer: Monostable operation

In monostable operation we have only one state stable and other state unstable. We have a input named Trigger to the 555 Timer. When we give no trigger timer stays in the stable state but when we give trigger then timer goes to the other state for a fixed time period and then goes back to the […]

## Timing Circuits: Introduction

The timing circuits are the special purpose circuits which are generally used in digital circuits. We have the following important types of timing circuits: 1. 555 Timers are used in timing circuits very often as they are more reliable and lost cost. We have the two modes of operation of 555 Timer: Monostable operation Astable […]

## Q8: MOD 8 Counter

Q-Implement a MOD-8 counter using Parallel-in Parallel-out register and Adder. Ans: We have a 3-bit register with two common inputs CLK & CLEAR for all 3 FFs. So we initiate the counter we clear all the FFs and then give clock. Whenever count reaches 7 output of adder becomes 000 with carry 1 and carry is […]

## Q7: Maximum Frequency

Q- Find the maximum clock frequency of the following circuit and specifications of the flip-flop are as T (setup) = 5ns T (hold time) = 8ns T (CLK to Q) = 2ns and delay of other components is T (buf) = 2ns, T (AND) = 4 ns, T (OR) = 4 ns, T (NOT) = […]

## Q6: Maximum Frequency

Q- Find the maximum clock frequency of the following circuit and specifications of the flip-flop are as T (setup) = 5ns T (hold time) = 4ns T (CLK to Q) = 9ns and maximum delay of the combinational circuit is T (c-delay) = 13 ns and delay of buffer is T (buf) = 2ns. Delay of […]

## Q5: Maximum Frequency

Q- Find the maximum clock frequency of the following circuit and specifications of the different flip-flop are as T1 (setup) = 5ns T1 (hold time) = 4ns T1 (CLK to Q) = 9ns, T2 (setup) = 4ns T2 (hold time) = 3ns T2 (CLK to Q) = 7ns T3 (setup) = 4ns T3 (hold time) […]

## Q4: Maximum Frequency

Q- Find the maximum clock frequency of the following circuit and specifications of the flip-flop are as T (setup) = 5ns T (hold time) = 4ns T (CLK to Q) = 9ns and delay of other components is T (buf) = 2ns,ï¿½ ï¿½ T (AND) = 4 ns, T (OR) = 4 ns,ï¿½ ï¿½ ï¿½ ï¿½ T (NOT) = […]

## Q3: Binary Multiplier

Q-Implement binary multiplication using shifter: Eg. If we are multiply 11 * 4 Then 11 = 1011 4 = 0100 Algorithm: For multiplication we first multiply the LSB of 4 (multiplier) with multiplicand and then shift it towards right. Then we multiply the next bit and then add it to the shifted result. Again we MULTIPLY, ADD […]