Combination Circuits

Q1: Timing Diagram

Q- We are implementing a 3-input AND gate using the following circuit: We can replace BLOCK with number of (a) Buffers   or   (b) Inverters. The delay of buffer is Tp=2ns. Now we need to choose components such that we have proper output at F= X.Y.Z and the waveforms are as: Ans:  Now if we orally […]

Combination Circuits

PARITY GENERATOR (3-bit MESSAGE)

Q-Implement the parity generator (a) Even (b) Odd for 3-bit message Ans: (a) Following is the truth table and K-map for even parity a              b             c             P(even) 0              0             0             0 0              0              1             1 0              1              0             1 0              1              1             0 1              0              0              […]

Combination Circuits

PARITY GENERATOR (4-bit MESSAGE)

Q-Implement the parity generator (a) Even (b) Odd for 4-bit message Ans: (a) Following is the truth table and K-map for even parity Binary number                  Parity (even) 0000                                       0 0001                                       1 0010                                       1 0011                                       0 0100                                       1 0101                                       0 0110                                       0 0111                                       1 1000                                       1 1001                                       0 1010 […]

Combination Circuits

Binary to Gray Code converter

In this circuit we’ll convert BINARY numbers to GRAY numbers. Following is the truth table for it: B3           B2          B1           B0           G3           G2          G1          G0 0.            0              0              0              0              0              0              0              0 1.            0             0             0              1 […]