Q-Implement a MOD-8 counter using Parallel-in Parallel-out register and Adder. Ans: We have a 3-bit register with two common inputs CLK & CLEAR for all 3 FFs. So we initiate the counter we clear all the FFs and then give clock. Whenever count reaches 7 output of adder becomes 000 with carry 1 and carry is […]

# Tag: flip flop

## Q7: Maximum Frequency

Q- Find the maximum clock frequency of the following circuit and specifications of the flip-flop are as T (setup) = 5ns T (hold time) = 8ns T (CLK to Q) = 2ns and delay of other components is T (buf) = 2ns, T (AND) = 4 ns, T (OR) = 4 ns, T (NOT) = […]

## Q5: Maximum Frequency

Q- Find the maximum clock frequency of the following circuit and specifications of the different flip-flop are as T1 (setup) = 5ns T1 (hold time) = 4ns T1 (CLK to Q) = 9ns, T2 (setup) = 4ns T2 (hold time) = 3ns T2 (CLK to Q) = 7ns T3 (setup) = 4ns T3 (hold time) […]

## Q2: Maximum Frequency

Q- Find the maximum clock frequency of the following circuit if specifications of the different flip-flop are as T1 (setup) = 5ns T1 (hold time) = 4ns T1 (CLK to Q) = 9ns, T2 (setup) = 4ns T2 (hold time) = 3ns T2 (CLK to Q) = 7ns T3 (setup) = 4ns T3 (hold time) […]

## Q1: Maximum Frequency

Q- Find the maximum clock frequency of the above circuit if specifications of the flip-flop are as T (setup) = 5ns T (hold time) = 4ns T (CLK to Q) = 9ns and maximum delay of the combinational circuit is T (c-delay) = 13 ns. There is a clock skew of +3ns for 2nd FF in […]

## Q: Design custom ripple counter

Q- Design the ripple counter whose output sequence is represented by the following state diagram. Ans: As it is a 3-bit counter hence we firstly arrange 3 FFs and now we design the combinational circuit to reset the counter at appropriate point. Q2 Q1 Q0 OUTPUT 0 0 0 0 0 0 1 1 0 1 […]

## USING K-MAPS to design counter

Q- Design MOD-3 ripple counter using (a) Observing outputs (b) K-maps to design the circuit. Ans: (a)We can design the MOD 3 counter using 2 FFs as 3 is less than 4 i.e. 22 and greater than 2. We can see directly that as we have to reset the counter only after 2 i.e. when output is […]

## Ripple counter

We can attach more flip-flops to make larger counter. We just use more flip-flops in cascade and give output of first to the clock of 2nd and output of 2nd to clock of 3rd and so on. This way every flip-flop would divide frequency of the clock by 2 and hence we can obtain a divide by larger […]

## Ring counter

This is a special type of register in which 1 moves in the output in the ring i.e. initially output of 1st FF is 1. On next edge this 1 is transferred to output of 2nd FF while previous output becomes 0. Similarly on next clock output of 3rd FF becomes 1. Similarly it continuous till last FF […]

## Shift register

In this type of register value stored in the register can be either shifted to left or right depending upon the circuit as: PARALLEL IN PARALLEL OUT: This type of shift registers is already discussed above. SERIAL IN SERIAL OUT: Right shift: Here data is shifted by one bit from left to right with every clock […]