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Digital Electronics
NUMBER SYSTEM
BINARY CODES
BOOLEAN ALGEBRA
BINARY LOGIC
LOGIC GATES
BOOLEAN ALGEBRA LAWS
CONSENSUS THEOREM
DIFFERENT FORS OF BOOLEAN EQUATIONS
RELATION B/W MAX & MIN TERMS
16 type of LOGIC FUNCTIONS
AND & OR GATE
Other GATES
XOR & XNOR gates
NEGATED & COMPLIMENTRY GATES
TRISTATE gates & DIP
Illustration of NEGATIVE & POSITIVE LOGIC
Relation B/W XOR & XNOR gates
UNIVERSAL GATES
Implementation of XOR using minimum gates
Implementation of XNOR using minimum gates
Different levels of CIRCUIT
Special Characteristics of an IC
QUESTIONS
Q1 (Timing Diagram)
Q2 (Timing Diagram)
Q3 (Timing Diagram - DIfferent units)
Q4 (Timing Diagram)
Q5 (Output of Series of NOR gate )
Q6 (Output of combination of XOR )
Q7 (Circuit of NAND gates & diff delays)
K MAPS
COMBINATIONAL CKT
SEQUENTIAL CIRCUITS
TIMING CIRCUITS

 

Binary logic

Binary logic deals with variables which have two discrete values and those two values can be true or false, on or off, yes or no etc. But we think in terms of 1 & 0. Those variables are called binary variables. In digital circuits we represent the higher value by 3V to 5V and lower value by 0V-0.8V. So if voltage within the range 3V - 5V then it is taken as 1 and within 0V – 0.8V it is taken as 0 in positive logic and the region between 0.8V – 2V is the transition region and known as NOISE MARGIN and is left to overcome the effects of noise.

Negative logic and positive logic: We have 2 values for a binary variable. The value which is higher  can be represented by H and lower value is represented by L. so when we take H as 1 and L as 0, it is taken as positive logic while when we take H as 0 and L as 1 then it is negative logic. It is only for the user to decide whether to use negative logic or positive logic. The manufacturer always specifies data sheets of integrated circuits in terms of H & L levels.

If we have a truth table given by manufacturer as

 

and we use a positive logic then we get a  OR gate (replacing H by 1 and L by 0) while for negative logic we get a negative logic AND gate (replacing H by 0 and L by 1). You can see we represent negative logic gate by placing small triangles at its terminals (both input & output)


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