These are those gates which have inverted inputs to the gate as shown below:

Negated AND gate is actually NOR gate while negated OR gate is NAND gate which can shown from the truth tables of Negated OR & Negated AND gate and from algebraic equations also.

**NEGATED AND** can also be called **invert-AND** and **NEGATED OR** can be called as **invert-OR**

**Complimentary gates: **Logic gates which give both inverted and non-inverted outputs are called complimentary gates. Suppose we have a 2-input complimentary AND gate, then it means that this gate simultaneously gives 2 outputs- one of AND gate and other of NAND gate. Such gates exist and are generally used in the circuits where not much space is available to mount new ICs. Also in complimentary gates internal circuitry is such that there in no extra time delay to calculate the inverted output i.e. inverted output and the non-inverted output come at time. Also if we use an inverter in place of complimentary gate then there would be extra time delay and extra space required. Such gates are represented as

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