Question 7: ANALYSIS OF NAND CIRCUIT

Q7- We implement the 3-input NAND gate circuit as follow and we are given the gate delay of d ns and

3 inputs are shown as:

And give us the output of the circuit and compare it with the ideal output.

Ans:  Firstly we NAND of A&B is calculated and then it is inverter to get A.B Then we NAND A.B and C to get NAND of A, B & C. The wave forms we get are as:

While the ideal output is

And now we compare the two outputs as:

We observe that following points are to be noticed while comparing:

• There is a delay of 3d in the actual output
• Also that actual output has shorter pulse width as compared to ideal.
• As we have the pulse width as p – 3d, this pulse can even vanish if delay of the gate (d) is increased or pulse width (p) is decreased.