Processor architecture types


In this architecture complex instructions are used and hence each instruction does a lot of work but takes many clock cycles. E.g. 8086, 8088


In this architecture simple instructions are used and one instruction takes only one clock cycle for execution. It is a common misunderstanding that RISC systems have fewer number of instructions while actually reduced means that instructions are very simple and takes only little time to execute. E.g. MIPS and SPARC


In this architecture data and program are stored together. Programs are fetched from the memory for execution by CPU. In Von Neumann architecture following pattern of instruction execution is followed:

  1. Instruction fetch: instruction and necessary data is fetched from memory.
  2. Decode: instruction and data are separated and instructions is decoded.
  3. Execute: instructions is executed and the corresponding data is manipulated and results are stored.

e.g.  8086 etc


In thismemory is divided into 2 parts: data and instructions. In pure Harvard architecture there were 2 memories for data and instruction. Instruction memory is for storing instructions only. Many DSPs (Digital Signal Processors) are modified Harvard architectures which is designed to access 3 distinct memory areas simultaneously: the program instructions, the signal data samples, and the filter coefficients.


Different computers put their multi-byte data words (i.e., 16-, 32-, or 64-bit words) in different ways in RAM. Each individual byte in a multi-byte word is still separately addressable. Some computers order their data with the most significant byte of a word in the lowest address, while others order their data with the most significant byte of a word in the highest address. This distinction is known as endianness.

Computers that order data with the least significant byte in the lowest address are known as “Little Endian“, and computers that order the data with the most significant byte in the lowest address are known as “Big Endian”. It is easier for a human to view multi-word data dumped to a screen one byte at a time if it is ordered as Big Endian (i.e. most significant at lowest address).

The user cannot tell the difference between computers that use the different formats. However, difficulty arises when different types of computers attempt to communicate with one another over a network.

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