Excitation of a flip-flop is actually exact opposite of what a truth table is. The truth table for the flip-flop gives us the output for the given combination of inputs and present output while an excitation table gives the input condition for the given output change. E.g. As in truth table we say for T […]
Tag: D flip flop
Q3: Maximum Frequency
Q- Find the maximum clock frequency of the following circuit and specifications of the flip-flop are as T (setup) = 5ns T (hold time) = 4ns T (CLK to Q) = 9ns and maximum delay of the combinational circuit is T (c-delay) = 13 ns and delay of buffer is T (buf) = 2ns. Ans: There is […]
Q1: Timing Diagram
Q- We are given a D FF which is used as a divide by 2 circuit and specifications of the flip-flop are as: T (setup) = 5ns T (hold time) = 4ns T (CLK to Q) = 9ns and circuit is as: Find Maximum frequency. Ans: I’ll recommend drawing the 1st edge of clock and then to […]