We can also do subtraction using adders. As we have already studied that we can do subtraction by 2’s compliment method in which we add 2’s compliment of subtrahend to minuend and 2’s compliment can be found by inverting all bits of subtrahend and then adding one. So we have to do as F= A […]
Tag: questions
Q-Implement BCD to Excess 3 converter using parallel adder
Ans: As we know to get Excess-3 from BCD we need to add 3 (0011) to the BCD number. So the circuit to implement the above is:
Implement Full Adder using Half adders
Q- Can be implement the full adder from 2 half adders? Ans: Yes we can implement the Full Adder using 2 half adders and one OR gate as follow: And the circuit diagram is as:
Example: K MAPS FACTS
Q- Simplify the following Boolean function in (a) sum of products form (SOP) (b) Product of sums form (POS) F(x, y, z, w) = ∑(0, 1, 2, 5, 8, 9, 10) Ans: We mark 1s in the squares corresponding to the terms present in the function and 0s for the terms missing from the function […]
Question 7: ANALYSIS OF NAND CIRCUIT
Q7- We implement the 3-input NAND gate circuit as follow and we are given the gate delay of d ns and 3 inputs are shown as: And give us the output of the circuit and compare it with the ideal output. Ans: Firstly we NAND of A&B is calculated and then it is inverter to get […]
Question 6: OUTPUT OF XOR CIRCUITS
Q6- What is the output of the circuits given below? Ans: Here we see that if we have X= 0 then outputs of both circuits is zero. But when we have X=1, then output of the circuit with even number of XOR gates is 1 And when we have X=1 and number of XOR gates […]
Question 5: OUTPUT OF CIRCUIT
Q5- What is the output of the following circuit? Ans: This circuit may look simple to you as one has to just evaluate every NOR gate and get the final output but I say it is even simpler than this. Let’s analyze the truth table of NOR gate: And we see that even if only one […]
Question 4: TIMING DIAGRAM
Q4- Draw the output waveform of the NAND gate when we have the two inputs as follow and delay of the gate is equal to 12.5 ns when output goes from LOW to HIGH and delay is 17.5 ns when output goes from HIGH to LOW. Ans: To get the exact output waveform we firstly draw […]
Question 3: TIMING DIAGRAM (Diff Units)
Q3- Sometimes delay of gates and the waveforms are given in different units. So let’s take such example with same circuit and delay as above but waveforms as below: Ans: So we convert the delay into ps (Pico seconds) So delay for NOR= 3ns = 3000ps Delay for BUFFER =1ns=1000ps Delay for AND=4ns=4000ps So the waveforms […]
Question 2: TIMING DIAGRAM
Q2- Draw the output of the circuit when waveforms of inputs X & Y are as given. Take initial output values as zero. We’ll first calculate output of NOR gate and delay the output by 3ns. Then we draw output of BUFFER with delay of 1ns and finally we take AND of 2 outputs and […]