Q- Find out the situation when the following circuit of MUX 2 to 1 would not work as expected and how can we eliminate the error.

Ans: When we have the static values at the inputs circuit would work fine but when ever there is a transition in the value of Select pin we have a situation we neither of the two inputs are selected. Following is the truth table for 2 to 1 MUX

SEL(s)    Y

0              A

1              B

(a) Suppose we have the SEL = 1, then we have ‘B’ at the output and when we have SEL= 0 we have ‘A’ at the output. But when there is a transition from SEL= 1 to SEL=0 there is problem we face.

When we change SEL from 1 to 0, AND2 deactivates and hence ‘B’ is not passed and as we have a delay of inverter, hence it would take 1 ns extra to activate the AND1 and hence even A is not immediately passed. So we see that neither A nor B is passed to Z for this 1 ns.

(b) Suppose we have the SEL = 0, then we have ‘A’ at the output and when we have SEL= 1 we have ‘B’ at the output. But when there is a transition from SEL= 0 to SEL=1 there is problem we face.

When we change SEL from 0 to 1, then it would take 1 ns extra to deactivate the AND1 and hence input ‘A’ gets passed to OR gate for this 1 ns. Also immediately after the change of SEL pin from 0 to1 we have the AND2 activated hence ‘B’ is also passed to OR gate for this 1 ns. So both the inputs A & B are passed to output for this 1 ns. But after the 1 ns we have correctly only ‘B’ at the output

Hence we see that in both transitions we have error for period of 1 ns

To correct this we can have an extra Buffer in the circuit which has a delay same as that of inverter i.e. 1 ns as shown next.