| Asynchronous | Synchronous | |
| Circuit | The logic circuit of this type of counters is simple to design and we feed output of one FF to clock of next FF | The circuit diagram for type of counter becomes difficult as number of states increase in the counter |
| Propagation Time | Propagation time delay of this type of counter is :Tpd = N * (Delay of 1 FF)which is quiet highN is number of FFs | Propagation time delay of this type of counter is:Tpd = (Delay of 1 FF) + delay of 1 gateInclusion of delay of 1 gate would be illustrated when we design higher counters: |
| Maximum operating frequency | And hence operating frequency is Low | And hence operating frequency is Higher |
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