Q- Find the maximum clock frequency of the following circuit and specifications of the flip-flop are as T (setup) = 5ns T (hold time) = 4ns T (CLK to Q) = 9ns and maximum delay of the combinational circuit is T (c-delay) = 13 ns
Ans: As input to first flip-flop is directly available and hence this doesn’t affect clock frequency but input to 2nd flip-flop reaches after various delays from the previous edge of the clock. We the above as follow:
And the complete clock can be represented as follow: c-delay is combinational delay
Hence clock time period = T CLK to Q + c-delay + Setup time = 9 + 13 + 5 = 27 ns
And maximum frequency of the circuit is F max = 1 / 27 = 3.7 MHz